Ultrathin nitride/oxide (/spl sim/1.5/0.7 nm) dual layer gate dielectrics have been formed using remote plasma enhanced CVD of nitride onto plasma-grown oxide interface layers. High accumulation capacitance (1.72 μF/cm2) is measured and the equivalent oxide thickness is 1.6 nm after quantum effect corrections. Compared to 1.6 nm oxides, a tunneling current reduction of more than 100 fold is found for devices with 1.6 nm N/O dielectrics due to increased film thickness and interface nitridation. Hole channel mobility decreases by about 5%, yielding very good P-MOSFET current drive. Excellent dielectric reliability and interface robustness are also demonstrated for P-MOSFET's with N/O dielectrics.
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Wu et al. (2000) studied this question.
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