This paper addresses the development of a micropower 176/spl times/144 CMOS active pixel image sensor that dissipates one to two orders of magnitude less power than current state-of-the-art CMOS image sensors. The chip operates from a 1.5-V voltage source and the power consumption measured for the chip running from an internal 25.2-MHz clock yielding 30 frames per second is about 550 /spl mu/W. This amount enables the sensor to run from a watch battery. In order to achieve design goals, a low-power sensor design methodology is applied throughout the design process from system-level to process-level, while realizing the performance to satisfy the design specification. As an autonomous sensor, it can be operated with only three pads [GND, VDD (1.2-1.7 V), DATAOUT]. The die occupies 4 mm/sup 2/ of silicon.
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Cho et al. (2003) studied this question.
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