Experimental engineering study demonstrates dual-mode asymmetric optical encryption on a silicon photonic chip, highlighting a pathway toward integrated, multi-user secure hardware.
In recent years, various optical encryption methods have emerged, demonstrating new advantages in terms of security and other aspects. However, the currently mainstream schemes based on liquid crystals and metasurfaces pose severe challenges to their practicality and universality due to the discrete nature of free‐space optical components and stringent requirements for optical path alignment. Silicon photonics technology can effectively remedy the above shortcomings, enabling high hardware integration and enhanced encryption security. The asymmetric optical encryption algorithm based on the scalable dual‐mode photonic computing chip proposed in this work can encrypt information in both amplitude and phase dimensions. In addition, multiple pairs of public and private keys can be generated using different wavelengths of light, thereby realizing asymmetric optical encryption among different users, effectively preventing unauthorized access. The chip is capable of high‐precision positive and negative value processing of dual dynamic operands in a highly parallel manner. In encryption experiments, the peak signal‐to‐noise ratio of the encrypted image can be as low as 1 dB, demonstrating the excellent performance of the algorithm implemented based on the silicon photonic platform. This work provides a new approach for improving the integration, encryption efficiency, and security of optical encryption hardware.
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Zhao et al. (2026) studied this question.
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