Channel mobility and on-resistance of vertical double implanted 4H-SiC MOSFETs at elevated temperatures

Temperature and gate voltage dependences of the channel electron mobility were studied in short-channel high-voltage vertical double implanted 4H-SiC MOSFETs (VDMOSFETs). With increasing gate voltage, field effect electron mobility, μ FE , increased, tending to saturate at large V g values reaching a maximum of ∼4 cm 2 V −1 s −1 at room temperature. With the temperature increase, μ FE increased monotonically and reached a value of ∼16 cm 2 V −1 s −1 at 510 K. These trends are explained by the high density of the interface traps, which was extracted from the temperature dependence of the threshold voltage. The electron mobility in the drift region decreased with temperature increase. As a result, the contribution of the drift region to the on-resistance was dominant at elevated temperatures limiting the VDMOSFETs performance at temperatures above ∼420 K. The on-resistance of VDMOSFETs was only weakly dependent on temperature within the temperature range from 300 K to 510 K.