High-voltage blocking (2.7-kV) implantation-free SiC bipolar junction transistors with lowon-state resistance (12m Ω · cm²) and high common-emitter current gain of 50 have been fabricated. A graded-base doping was implemented to provide a low-resistive ohmic contact to the epitaxial base. This design features a fully depleted base layer close to the breakdown voltage providing an efficient epitaxial JTE without ion implantation. Eliminating all ion implantation steps in this approach is beneficial for avoiding high-temperature dopant activation annealing and for avoiding generation of lifetime-killing defects that reduce the current gain.
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Ghandi et al. (2008) studied this question.
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