In this paper, the influence of post-oxide annealing on the DC performance of the atomic-layer-deposited Al 2 O 3 /AlGaN/GaN metal–insulator–semiconductor high electron mobility transistor on a high-resistivity silicon substrate is reported. With annealing, the maximum transconductance and gate–drain breakdown voltage of the device increased. The threshold voltage positively shifted, and the gate forward current did not change much. The improved quality of the Al 2 O 3 layer after annealing is believed to due to the reduction of the deep level traps or interface states.
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Zhou et al. (2011) studied this question.
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