A high-speed CMOS comparator for A/D convertors is discussed. The circuit has high resolution (better than 5 mV) in combination with high speed (clock frequencies up to 50 MHz). The advantage of the proposed structure is that no clock feedthrough is injected to the input, only one switch in a symmetrical structure is used and the effect of any current biasing on the comparator speed has been reduced.
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Steyaert et al. (1988) studied this question.
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