Clock recovery circuits based on matched gated oscillators are proposed. Lock is acquired on the first data transition, even with non-return-to-zero line coding and with instantaneous and arbitrarily large phase shifts of the incoming signal. Simulated results of a fully integrated 650 Mbit/s clock recovery circuit designed in an existing 0.9 μm CMOS technology are also presented.
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Banu et al. (1992) studied this question.
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