The reliability of gate oxide is a crucial aspect of device downscaling. In this paper, we demonstrate that increasing operating temperature of downscaled logic devices combined with the increased detrimental effect of elevated temperature on very thin SiO/sub 2/ films will significantly reduce the device reliability. We discuss the effect of elevated temperature on the factors contributing to oxide breakdown and observe that their combined effect does not result in Arrhenius-like decrease of time-to-breakdown. This is related to our observation that oxide defects created at different temperatures are not completely equivalent. Consequently, oxide damage created during electrical stress at different temperatures is not simply cumulative. We also discuss several possible microscopic models attempting to explain this observation. Finally, we briefly review the methodology of the oxide reliability prediction and present a reliability projection for very thin oxides at the expected elevated operating temperatures.
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Kaczer et al. (2000) studied this question.
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