A 3–25 Gb/s Four-Channel Receiver With Noise-Canceling TIA and Power-Scalable LA

A 3-25 Gb/s four-channel receiver with noise-canceling transimpedance amplifiers and power-scalable limiting amplifiers is presented. It is fabricated in a 40-nm CMOS process. Each channel provides an overall gain of 64 dB · Ω. The measured input integrated noise is 2.7 μArms, and the measured bit error rate is-12for a 25-Gb/s pseudorandom bit sequence of 27-1. The power consumption is 103 mW per channel from a 1.3-V supply. The total area is 1.16 mm2.