A novel 0.5 V CMOS light-to-digital converter demonstrates high sensitivity and low power consumption for photoplethysmographic heart-rate sensing.
A 0.5 V CMOS light-to-digital converter (LDC) based on a nonuniform quantizer and off-chip photodiode enables a photodiode bias current (Ibias) range spanning 4 nA to 3.5 μA while consuming less than 4 μW of power. Using an off-chip LED as a modulated light source, measurements with a photodiode current signal having modulation frequency of 1.2 Hz (72 beats per minute) and 0.5% peak-to-peak amplitude relative to Ibiasperformed at the low and high end of the Ibias range confirm over 30 dB of SNR for an integration bandwidth spanning 0.5 to 5 Hz. Using off-chip digital signal processing of the LDC output, instantaneous period jitter (a proxy for instantaneous heart rate) is measured to be less than 0.45% (rms) of the period, and the high sensitivity of the LDC allows detection of the heart-rate signal from a finger pressed against the off-chip photodiode using only ambient light. Key circuit components of the LDC include a wide range logarithmic digital-to-resistance converter (DRC) utilizing digital multibit ΔΣ modulation to achieve fine resolution and a nonuniform quantizer based on a laddered inverter quantizer (LIQAF) which also acts as a low-noise front-end amplifier and filter.
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Alhawari et al. (2013) studied this question.
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