A CMOS square-law programmable floating resistor independent of the threshold voltage

A CMOS architecture for a floating linear resistor which exploits the square-law model of the MOS transistor is presented. The architecture is programmable by DC control voltage and is easily modified such that it is threshold-voltage independent, allowing large signal handling and immunity to substrate noise. Design trade-offs and device size optimization are investigated. Second-order effects due to mobility degradation and channel length modulation are analyzed and a simple high frequency model for the resistor is developed. The architecture is fabricated in a 2 mu m p-well CMOS MOSIS process. The resistor occupies 210 mu m*270 mu m, consumes 0.4-4.0 mW with +or-5 V supply and exhibits a signal (at 1% THD) to noise ratio of more than 100 dB over a 1 V range of the DC control voltage.>