Threshold Voltage of Si Single-Electron Transistor

We experimentally evaluate threshold voltages of Si single-electron transistors (SET) in order to investigate the effect of offset charges. Threshold voltages show a clear relation to the gate capacitance of SETs, which is a device parameter reflecting the size of the Si island of SETs. This indicates that the fabricated Si SETs do not suffer much from random offset charges that cause the threshold voltages to fluctuate. Moreover, our theoretical analysis shows that the obtained negative threshold voltages strongly suggest the reduction of the band gap of Si islands due to oxidation-induced strain.