Modeling of Quantization Effects in Digitally Controlled DC–DC Converters

In digitally controlled dc–dc converters with a single voltage feedback loop, the two quantizers, namely the analog-to-digital (A/D) converter and the digital pulse-width modulator (DPWM), can cause undesirable limit-cycle oscillations. In this paper, static and dynamic models that include the quantization effects are derived and used to explain the origins of limit-cycle oscillations. In the static model, existence of dc solution, which is a necessary no-limit-cycle condition, is examined using a graphical method. Based on the generalized describing function method, the amplitude and offset-dependent gain model of a quantizer is applied to derive the dynamic system model. From the static and dynamic models, no-limit-cycle conditions associated with A/D, DPWM and compensator design criteria are derived. The conclusions are illustrated by simulation and experimental examples.