Capacitance–voltage (C–V) characteristics are used to investigate double heterojunction strained Si/SiGe MOS capacitors. Structures of this type potentially form the channels of CMOS devices based on the strained Si/SiGe material system. The technique represents a fast and non-destructive method to determine important characteristics such as layer thicknesses, threshold voltages and band offsets. Moreover, it contributes to the design of optimum heterostructures for CMOS. Experimental C–V data are compared with simulation and complementary results including SIMS and TEM to confirm the accuracy of the technique.
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Chattopadhyay et al. (2003) studied this question.
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