Frequency Scaled Green Data Flip Flop on Different Nanometer Technology Based FPGA

In order to meet the energy requirement of the total population of the globe, we have designed an energy efficient data flip flop on different nanometer technology-based FPGA. We used frequency scaling technique in order to analyze power dissipation. The power has been analyzing for Virtex 6 (40nm) FPGA, Spartan 3 (90nm) FPGA, Spartan 6 (45nm FPGA). We varied the frequency from 10 MHz to 100 GHz and observed the different powers of chips which are clustered on data flip flop, e.g. Clocks, Signals, I/O, Leakage, and Total power. We observed that at low frequency, there is less power dissipation whereas at high frequency more power is dissipated.