Studies of annealing of neutron-produced defects in silicon by transconductance measurements of junction field-effect transistors

Annealing behavior of neutron-produced defects in silicon was studied by measuring the phase angle ϑ of the small-signal transconductance of the junction field-effect transistors (JFET’s). Three deep levels (N-1, N-2, and N-3 levels) in n-type silicon and two deep levels (P-1 and P-2 levels) in p-type silicon, introduced by irradiation, annealed gradually. Their energy levels and capture cross sections have been already reported by us. Three deep levels (P-3, P-4, and P-5 levels) were observed in annealed p-type silicon in the temperature range 150–300 °C. For these defects, ϑ was measured as a function of frequency to obtain the time constant. From the temperature dependence of the time constant, assuming that capture cross sections are independent of temperature, the energy levels of P-3, P-4, and P-5 were estimated to be Ev+0.21, Ev+0.40, and Ev+0.30 eV, respectively. The calculated hole capture cross sections of these levels were 2.2×10−15, 8.7×10−14, and 1.2×10−14 cm2, respectively. Comparison with other published data was made. It was found that N-3 and P-2 levels corresponded to the divacancy. Furthermore, it seemed that P-3, P-4, and P-5 levels corresponded to the high-order vacancy defects.