This paper presents design techniques and performance bounds for implementing Q-enhanced, LC bandpass filters in silicon IC technologies. These filters offer significant advantages over switched capacitor and Gm-C based designs, including higher frequency of operation and lower power consumption for a given dynamic range. A prototype 200 MHz, fourth-order filter implemented in a 2 /spl mu/m n-well CMOS process is described, and measured performance is compared with theoretical predictions. The prototype filter operates at a selectivity Q of 100 and draws less than 8 mA when operating from 3 to 5 V supplies, making it potentially suitable for use as a first IF filter in modern cellular and PCS receivers.
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Kuhn et al. (1996) studied this question.
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