Topology, Efficiency Analysis, and Control of a Four-Level π -Type Converter

This paper provides a comprehensive analysis for a four-level π-type converter for low-voltage applications. This topology is a kind of reduced device-count neutral-point-clamped multilevel converter and formed by only six switches in each phase leg. The line (phase-to-phase) output voltage can have seven levels and the output harmonics are much lower than that of a standard two-level converter. The switching states and their associated output voltage levels have been analyzed. A generalized averaged analytical power loss model of this converter has also been developed to investigate the loss distribution among the power devices as well as the efficiency. The four-level π-type converter has a higher efficiency when the switching frequency is above 5 kHz compared with two-level and three-level converters with the power devices used in this paper. The reduced output harmonics, hence reduced filtering requirement together with improved efficiency and cooling (heat sink) requirement, offer a higher density alternative to the two-level converter. A simplified level shifted carrier-based modulation method with dynamic optimal zero-sequence signal injection has been employed to modulate the converter and to control dc-link neutral-point voltages. This paper has experimentally validated the predicted four-level π-type converter efficiency and the neutral-point voltage balancing control with a back-to-back configuration under high modulation indices and unity power factor. The neutralpoint voltage balance region has been plotted and experimentally verified.