Simulation analysis demonstrates high-precision synchronization for lithography stages, indicating enhanced overlay accuracy in semiconductor manufacturing.
The synchronization accuracy between the wafer stage and reticle stage in lithography is critical to overlay and critical dimension uniformity. Existing iterative learning control (ILC) methods indirectly optimize synchronization via time‐domain errors, failing to balance low‐frequency tracking accuracy and high‐frequency noise suppression; thus, they cannot achieve optimal synchronization performance. To address this issue, this paper proposes a synchronization performance‐oriented frequency‐domain ILC approach, which embeds a comprehensive frequency‐domain index integrating Moving Average and Moving Standard Deviation into the ILC learning law. An adaptive learning gain is designed to balance convergence speed and disturbance rejection. Rigorous theoretical analyses confirm the method's asymptotic convergence under deterministic conditions and almost sure convergence under stochastic disturbances. Simulation results demonstrate that the proposed method outperforms two representative ILC methods, achieving faster convergence, higher accuracy with a maximum synchronization error of 0.1117 nm, and strong robustness.
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Zhou et al. (2026) studied this question.
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