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Experimental testing reveals mixed recoverable and permanent failures in an irradiated Cyclone V SoC board, highlighting the need for radiation-tolerant regulation and redundant diagnostics.
Board response was evaluated through Quartus-based configuration checks, Verilog-HDL functional diagnostics, boundary-scan interrogation, communication-interface testing, power-rail measurements, planar silicon detector fluence monitoring, and post-irradiation inspection. During the EG-5 campaign, recurrent shutdown-and-recovery cycles indicated transient disturbances in board-level operation. The approximately 4-h IREN exposure produced more severe degradation affecting the HPS_DDR3 interface, UART-to-USB communication path, USB-Blaster II/JTAG access, Ethernet subsystem, voltage-regulation network, and external power infrastructure. Post-irradiation troubleshooting identified degradation in three of the six onboard LDO regulators: U4 and U5 in the 1.5-V VCC1P5 branch and U14 in the 1.8-V VCC1P8 branch. Replacement of these devices restored the affected regulated outputs, while the remaining principal voltage rails were verified as stable. Nevertheless, JTAG device enumeration, TDO/IDCODE response, and boundary-scan access remained unavailable, demonstrating a mixed recoverable/non-recoverable failure regime in which power integrity could be restored but configuration and diagnostic access remained permanently lost. Planar silicon detectors positioned near the exposed board region were used only as auxiliary neutron-fluence monitors and were not treated as structural equivalents of the SoC FPGA. Because the absolute gamma dose at the board position was not independently measured, the exposure is characterized primarily through the neutron-field parameters, with the unseparated gamma contribution treated as an experimental limitation. The results are directly relevant to the radiation qualification of MPD TPC FPGA-based electronics and demonstrate the need for complete board-level testing, radiation-tolerant power regulation, independent rail monitoring, improved isolation of auxiliary electronics, and redundant diagnostic paths that do not depend exclusively on JTAG.
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Ghoneim et al. (2026) studied this question.
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