Electrical and structural characterization of metal–oxide–semiconductor capacitors with silicon rich oxide

Metal–oxide–semiconductor capacitors in which the gate oxide has been replaced with a silicon rich oxide (SRO) film sandwiched between two thin SiO2 layers are presented and investigated by transmission electron microscopy and electrical measurements. The grain size distribution and the amount of crystallized silicon remaining in SRO after annealing have been studied by transmission electron microscopy, whereas the charge trapping and the charge transport through the dots in the SRO layer have been extensively investigated by electrical measurements. Furthermore, a model, which explains the electrical behavior of such SRO capacitors, is presented and discussed.