Ionization Radiation Damage of 65 nm nMOS Technologies Under Different Bulk Voltages and Temperatures

In high-energy physics experiments, the transistors of monolithic active pixel sensors (MAPS) typically operate with a p-type substrate connected to voltages below 0 V. This back bias is used to expand the depletion region of the detector, thereby enhancing its detection efficiency. If the detector and readout electronics share the same substrate, the same back bias will be applied to the nMOS transistors in the readout. The applied back bias modifies the electric field that traverses the transistor oxides, influencing their response to ionizing radiation. Understanding the radiation response of nMOS transistors when a negative back bias is applied is crucial for characterizing the CMOS technologies used in pixel detectors. This paper presents results from three irradiation experiments with different back bias and temperatures, conducted on nMOS devices manufactured using a 65 nm commercial imaging technology. These results indicate that the bias voltage significantly affects the behavior of the charges trapped in the shallow trench isolation (STI).