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Three-dimensional (3D) heterojunction solar cells (HSCs) were fabricated by thermal deposition of a compact CdTe layer onto ZnO nanorods (NRs). Although the 3D architecture obviously improves the short-circuit current of HSCs, the open-circuit voltage is rather low, and this problem can be addressed by inserting an intermediate layer between ZnO NRs and the CdTe layer. On the basis of experimental and theoretical analyses, we found that the low open-circuit voltage mainly arose from the incomplete depletion layer and serious recombination of carriers at the CdTe/ZnO interface. The CdS intermediate layer can redistribute the depletion regions and eliminate the interface defects, thus remarkably improving the open-circuit voltage.
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Wang et al. (2014) studied this question.
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