A self-aligned 12-GHz Si bipolar transistor was fabricated in a relatively poorly equipped laboratory. Emitter and base profiles were implanted and no polysilicon emitter was used. The base implantation was split into two parts, thus avoiding irreproducible items and perimeter effects. Circuit simulations indicated that bit rates of 10 Gb/s can be realized. For the simulations, double-staged emitter followers were used in both circuits, and bond pads and bond wires were taken into account. Further optimization of the transistor parameters and the transistor geometries in the circuits should yield still higher bit rates.>
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H.-U. Schreiber (1989) studied this question.
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