A pixel-parallelself-similitudecomputation architecture has been developed for multiple-resolution directional edge filtering based on focal-plane image processing. Theself-similitudeorganization has enabled pixel-by-pixel multiple-resolution image filtering with minimal complexity in interconnects. As a result, it has become possible to accomplish any (1/2)n-resolution directional edge filtering in (n+2) steps. An analog edge-filtering chip implemented using a switched floating-gate MOS (neuMOS) technology that is capable of performing four-directional edge filtering at full, half, and quarter resolutions was designed and fabricated in a 0.35-mum 3-metal CMOS technology. The concept has been experimentally verified using the fabricated chip, and the four-directional edge filtering at full, half, and quarter resolutions was demonstrated by measurement.
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Takahashi et al. (2009) studied this question.
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