An approach to fabricating microstructures that incorporate circuits using a post-CMOS process

This study proposes a method of fabricating microstructures that incorporate circuits using a standard CMOS (complementary metal oxide semiconductor) process and a post-process. The post-process has two main steps. One uses a photoresist (PR) mask to protect the bonding pads, the circuits and the unneeded etched regions in the chip. The other step employs CF 4 /O 2 RIE (reactive ion etching) and SF 6 /O 2 RIE to etch the sacrificial layers to release the suspended microstructures. A 5.8 GHz low-noise amplifier (LNA) was employed to verify whether the post-process affects the performance of the circuits or not. The test results indicated that the performance of the LNA was the same before and after the post-process, proving that the post-process did not change the functionality of the circuits. Hence, the advantage of the post-process is that it does not damage the bonding pads, the passivation layers and the circuits, which are protected by the PR mask.