Experimental study demonstrates low-temperature integration of freestanding ferroelectrics on MoS2 transistors, indicating a scalable pathway for energy-efficient neuromorphic hardware.
Ferroelectric memories have emerged as promising candidates for nonvolatile memory and neuromorphic computing owing to their capability for direct channel modulation through polarization switching. However, the high thermal budget required for synthesis and post‐annealing processes hampers scalable integration and degrades interfacial quality. Here, we present a freestanding hafnium‐based ferroelectric strategy that enables the fabrication of high‐performance top‐gate ferroelectric field‐effect transistors (FeFETs) on van der Waals (vdW) MoS 2 channels at low temperatures without post‐annealing. The freestanding Hf 0.5 Zr 0.5 O 2 (FS‐HZO) FeFETs, featuring a metal–ferroelectric–metal–insulator–semiconductor (MFMIS) architecture, exhibit a pronounced anticlockwise normalized memory window of 0.56 V nm −1 . They demonstrate proof‐of‐concept nonvolatile behavior with endurance exceeding 2 × 10 3 cycles, retention over 2 × 10 3 s, and stable operation up to 85°C, maintaining an on/off ratio of 10 6 and an extrapolated value of 10 4 after 10 years. Precise ferroelectric control of the MoS 2 channel conductance enables multilevel switching and synaptic plasticity, achieving high accuracy in image recognition tasks. This work provides a low‐thermal‐budget freestanding hafnium‐based integration strategy and a device‐level building block for future vdW FeFET arrays, offering a promising pathway toward energy‐efficient compute‐in‐memory and neuromorphic architectures.
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Zhao et al. (2026) studied this question.
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