We investigate the characteristics of single-crystal-like (SCL) poly-Si nanowire (SCL poly-Si NW) thin-film-transistors with gate-all-around (GAA) structures. The GAA SCL poly-Si NWs are prepared by a modified sidewall spacer process utilizing an amorphous silicon ( α-Si) mesa structure. The combination of the high surface-to-volume ratio of the NW and a nominal gate length of 0.25 μm lead to clear improvement in electrical performance, including a steep subthreshold swing (90±15 mV/dec), a virtual absence of drain-induced barrier lowering (21±13 mV/V), and a very high ON/OFF current ratio ~ 7×107(VD=1 V, VG=3 V).
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Liu et al. (2013) studied this question.
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