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Different fast Fourier transform (FFT) algorithms for hardware implementation have been considered. We propose an implementation whereby two radix-N1/2passes are carried out in parallel and in which each N1/2-point transform is carried out via a serial input parallel output transform circuit. The processing rate is one clock cycle per input point for the N-point transform regardless of the value of N chosen. The circuit is being implemented with TTL logic and will be used to perform spatial frequency domain filtering on two dimensional infrared camera images in real time; real time meaning processing between frame display.
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Buijs et al. (1974) studied this question.
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