A 16-mW 78-dB SNDR 10-MHz BW CT Δ Σ ADC Using Residue-Cancelling VCO-Based Quantizer

This paper presents a continuous-time (CT)Δ Σmodulator using a VCO-based internal quantizer. It incorporates a nonlinear VCO as the second stage in a two-stage residue canceling quantizer (RCQ) and mitigates the impact of its nonlinearity by spanning only a small region of the VCO's V-to-F nonlinear tuning curve. The order of noise shaping is increased by placing the RCQ in a continuous-timeΔ Σloop. Using only a first order loop filter, the proposedΔΣmodulator achieves second order noise shaping. Fabricated in a 90-nm CMOS process, the prototype modulator occupies an active area of 0.36 mm²and consumes 16 mW power. It achieves a peak SNDR of 78.3 dB in 10-MHz bandwidth and an SFDR of better than 85 dB when clocked at 600 MHz. The figure of merit of the modulator is 120 fJ/conv-step.