A ternary gate which realises the basic operators of two different algebras is designed with c.m.o.s. integrated circuits. Both algebras have been selected because they are associated with powerful minimisation procedures. A delay time of 350 ns may be obtained.
No takes yet. Share an insight, caveat, or question.
Huertas et al. (1976) studied this question.
Synapse has enriched 5 related papers. Consider them for comparative context: