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The time-varying topology created by the switch-mode operation of power semiconductor devices in energy conversion systems presents difficulties in analysis. Presently available methods for simulating the behavior of these systems include the use of the digital computer, the conventional analog computer, and the breadboard. A new philosophically distinct technique called "parity simulation" produces a topologically isomorphic transformation of the system under study; that is, it exhibits a 1:1 correspondence, or parity, with the structure of the actual network. A parity simulator utilizes terminal equivalent representations of network elements. The microcomputer based interface is highly user oriented. Nonlinear or time-varying element parameters are easily incorporated. Several simulation examples are presented.
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John G. Kassakian (1979) studied this question.
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