Memory devices containing nanocrystalline -embedded Zr-doped high- dielectric film have been prepared and characterized. The memory effect was manifested by the large counterclockwise capacitance–voltage hysteresis, e.g., 1.22 at gate bias, and negative differential resistance region in the positive bias current–voltage range. The maximum trapped charge density of was obtained after sweep voltage range. The memory effects were mainly caused by electron trapping at low bias voltage. A large memory operation window, e.g., , with a long charge-retention time, e.g., , was achieved under the proper gate-stress voltage. It is a viable dielectric for future nanosize metal-oxide-semiconductor field-effect transistors and capacitors.
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Lu et al. (2008) studied this question.
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