A Novel Ferroelectric Material for Application in Metal-Ferroelectric-(Oxide)-Silicon [MF(O)S] Structures

Standard ferroelectric nonvolatile memories have relatively large memory cell sizes, leading to high manufacturing costs. A 1-transistor (1T) memory cell reduces the area requirements considerably rendering ferroelectric memories cost competitive. The ferroelectric material is deposited directly on silicon with a buffer layer in between silicon and ferroelectric. This interfacial oxide layer is desirable to provide a stable interface. Commonly used ferroelectric materials have relatively high dielectric permittivity so that most of the applied voltage drops over this interfacial layer making low voltage operation difficult. Another challenge in a 1T cell is to achieve adequate data retention, which is negatively impacted by the depolarization field, mobile ionic charges and charge injection. A new ferroelectric material has been developed with parameters ideally suited for 1T cell technology enabling low voltage operation and optimizing retention. The material is deposited by MOCVD technology using liquid precursor injection into a flash evaporator.