Folded-collector I/SUP 2/L offers an effective method of controlling the saturation of the n-p-n transistor simply by controlling the ratio of two areas: the area of the output collector(s) and the area of a `dummy' collector. This extra collector is folded back and connected to the input base. The structure improves the minimum delay of the basic I/SUP 2/L gate. Moreover, the structure has many circuit applications where a current scaling factor is required, e.g., threshold and ternary logic. Some of these circuits are given.
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M.I. Elmasry (1976) studied this question.
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