High-speed A/D conversion can be achieved by employing a parallel array of M A/D converters interleaved in time, each working at 1/Mth of the sampling rate. Theoretically, the resolution of the structure is given by the resolution of the A/D converters in the array (subconverters). In practice, however, mismatches among the subconverters lead to a decrease in the resolution. The effect of such mismatches is analyzed in terms of a signal-to-noise ratio defined as the ratio between the energy of the input analog signal and the energy of the error signal due exclusively to these mismatches. The analysis shows that the distortion is comparable to that generated by nonuniform sample timing in the analog demultiplexer when converting a single high-speed signal into several low-speed sampled-and-held signals. The results of the analysis can be used to specify the degree of precision to be achieved in an actual monolithic implementation.>
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Petraglia et al. (1991) studied this question.
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