Impact of stress in ICP‐CVD SiN x passivation films on the leakage current in AlGaN/GaN HEMTs

The impact of the stress in room temperature inductively coupled plasma chemical vapour deposited (ICP‐CVD) SiN x surface passivation layers on off‐state drain ( I DS‐off ) and gate leakage currents ( I GS ) in AlGaN/GaN high electron mobility transistors (HEMTs) is reported. I DS‐off and I GS in 2 μm gate length devices were reduced by up to four orders of magnitude to ∼10 pA/mm using a compressively stressed bilayer SiN x passivation scheme. In addition, I on / I off of ∼10 11 and subthreshold slope of 68 mV/dec were obtained using this strain engineered surface passivation approach.