Characterization of Negative-Bias Temperature Instability of Ge MOSFETs With GeO₂/ Al₂ O₃ Stack

Ge is a candidate for replacing Si, especially for pMOSFETs, because of its high hole mobility. For Si-pMOSFETs, negative-bias temperature instabilities (NBTI) limit their lifetime. There is little information available for the NBTI of Ge-pMOSFETs withGe/ GeO₂/ Al₂ O₃stack. The objective of this paper is to provide this information and compare the NBTI of Ge- and Si-pMOSFETs. New findings include: 1) the time exponent varies with stress biases/field when measured by either the conventional slow dc or pulseI-Vtechnique, making the conventionalVg-accelerated method for predicting the lifetime of Si-pMOSFETs inapplicable to Ge-pMOSFETs used in this paper; 2) the NBTI is dominated by positive charges (PCs) in dielectric, rather than generated interface states; 3) the PC inGe/ GeO₂/ Al₂ O₃can be fully annealed at 150∘ C; and 4) the defect losses reported for Si sample were not observed. For the first time, we report that the PCs in oxides on Ge and Si behave differently, and to explain the difference, an energy-switching model is proposed for hole traps in Ge-MOSEFTs: their energy levels have a spread below the edge of valence band, i.e.,Eᵥ, when neutral, lift well aboveEᵥafter charging, and return belowEᵥfollowing neutralization.