A composite step-graded collector of InP/InGaAs/InP DHBT has been investigated for minimised carrier blocking. The optimised collector has the following sub-layers: a 100 Å n- InGaAs layer; three 200 Å n- InGaAsP layers; and a 100 Å, n = 3 × 1017 cm-3 InP layer, and the rest are n- InP. The InGaAsP layers should be chosen to give approximately equal band offset at the heterointerfaces.
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Chor et al. (1996) studied this question.
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