A low-power FMCW 80 GHz radar transmitter front-end chip is presented, which was fabricated in a SiGe bipolar production technology (fT=180 GHz,fmax=250 GHz ). Additionally to the fundamental 80 GHz VCO, a 4:1-frequency divider (up to 100 GHz), a 23 GHz local oscillator (VCO) with a low phase noise of -112 dBc/Hz (1 MHz offset), a PLL-mixer and a static frequency divider is integrated together with several output buffers. This chip was designed for low power consumption (in totalf= 24.5 GHz). Measurements of the double-PLL system at 80 GHz showed a low phase noise of -88 dBc/Hz at 10 kHz offset frequency.
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Pohl et al. (2012) studied this question.
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