Evaluation Method of Electronic Characteristic Changes of Stress-Induced Multilayer Chip in Resin-Molded Electronic Packages

In electronic packages such as BGA and LGA packages, it is very important for the reliability of packages to reduce the residual stress on the surfaces of semiconductor chips. In recent years, product defects caused by changes in the electrical operating characteristics of the semiconductor devices in the chip produced by residual stress generated in the semiconductor chip within the semiconductor package have also become a problem. That has resulted in a need to accurately estimate residual stress and electronic characteristic changes within the package from the design stage and the widespread use of simulation by the finite element method (FEM) or other techniques for that purpose. In this research, the authors proposed the evaluation method to predict the electronic characteristic changes of stress-induced multilayer chips in resin-molded electronic packages. The developed technique considering the stress singular field and the piezoelectric effect made it possible to predict electronic characteristic changes of multilayer chips in resin-molded electronic packages accurately.