Emerging Post‐CMOS Hardware Neurons for Brain‐Inspired Computing: Devices, Circuits, and System Integration

The fundamental energy and latency limitations of the von Neumann architecture have necessitated a paradigm shift toward neuromorphic systems. This approach addresses the “memory wall” bottleneck by emulating the brain's event‐driven and massively parallel processing capabilities. However, the physical realization of these neurons in hardware remains a critical challenge. While complementary metal–oxide–semiconductor (CMOS) based implementations can simulate neuronal dynamics, they are constrained by high transistor counts and excessive power consumption, which limits their scalability for high‐density integration. This review provides a comprehensive analysis of artificial neurons starting with the description of biological neurons. The various neuron models and learning models are discussed to establish the functional requirements for hardware emulation. We subsequently detail the limitations of CMOS neurons as a motivation to the transition toward post‐CMOS neurons. These include emerging device‐based implementations of integrate‐and‐fire neurons, Hodgkin–Huxley neurons, and other neurons with novel functionalities. Furthermore, we discuss the pathway for enabling this brain‐inspired technology by evaluating system‐level architectures and deriving application‐specific requirements for real‐world deployment. Finally, we present conclusions and future outlooks for achieving energy‐efficient and high‐density neuromorphic computing systems.