A 4.2- mu m/sup 2/ stacked-capacitor DRAM (dynamic random-access memory) cell was achieved using conventional i-line photolithography that realizes 0.6- mu m pattern delineation. To obtain sufficient stored charge for memory operation, self-aligned plate-isolation technology, a novel pattern-enlargement method named peripherally added resist lithography (PEARL), and a highly reliable ultrathin capacitor dielectric film were developed. These technologies enable a stored charge of 25 fF/b (41 fC/b) in the present cell. Charge-retention characteristics and alpha-particle immunity are favorable, indicating that this cell is a good candidate for application to 16-Mb DRAMs.>
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Kimura et al. (1988) studied this question.
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