Feature-scale charging simulations during gate electrode overetching in high-density plasmas reveal that the thickness of the insulating mask plays a critical role in charging damage. When thinner masks are used, the electron irradiance of the conductive part of the sidewalls increases, causing the charging potentials of the polysilicon lines to decrease, thus reducing the probability for catastrophic tunneling currents through the underlying oxide. Simultaneously, changes in the charging potential distribution at the bottom SiO2 surface cause a significant perturbation in the local ion dynamics which, in turn, adversely affects notching. Notches are predicted to form everywhere in a line-and-space structure, even when the lines are electrically isolated. The results suggest that the trend toward thinner (hard) masks—to keep the aspect ratio low as device dimensions shrink—should reduce oxide failure but at the cost of more severe notching.
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Hwang et al. (1997) studied this question.
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