Low-Cost FPGA Implementation of Volterra Series-Based Digital Predistorter for RF Power Amplifiers

This paper presents a low-complexity and low-cost hardware implementation of a Volterra series-based digital predistorter (DPD). This is achieved by introducing two novel model complexity reduction techniques into the system, namely, lookup table assisted gain indexing and time-division multiplexing for multiplier sharing. Experimental results show that this novel DPD implementation uses much less hardware resources, but still maintains excellent performance compared to conventional approaches.