This paper presents and compares two types of 2-D cubic-spline (2-D-CS) digital predistorters for linearizing a power amplifier (PA), which is used in dual-band transmitters. In the conventional 2-D-CS representation, the gain functions must be first extracted using an alternate basis, whereas in the proposed 2-D least-squares cubic-spline (2-D-LSCS) approach, a new 2-D-CS basis is introduced such that the basis weights can be extracted directly from the measured data using the least-squares method. The 2-D basis functions are calculated from 1-D basis functions to reduce the signal-processing resource usage in the real-time implementation. A field-programmable gate-array (FPGA) test bench integrating the concurrent dual-band RF system is utilized to verify the linearization performance of the new 2-D-LSCS predistorter. Two different test scenarios involving three carrier-wideband code division multiple access and long-term evolution signals, which are 310 MHz apart, are considered. The experimental results on a 10-W dual-band PA shows that the proposed 2-D-LSCS basis improves the performance up to 3 dB in both the adjacent channel power ratio and normalized mean square error with reduced FPGA resources and faster extraction time when compared to the conventional 2-D memory-polynomial and 2-D-CS approaches.
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Naraharisetti et al. (2015) studied this question.
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