In polycrystalline silicon thin-film transistors, the electric field is concentrated, the carrier density is increased, and the current density is enhanced at active layer edges. This phenomenon is confirmed using the two-dimensional (2-D) device simulation. Because of this phenomenon, the on-current is not proportional to the gate width. This dependence of the on-current on the gate width is confirmed using the 2-D device simulation and experiment.
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Kimura et al. (2001) studied this question.
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