Performance estimation of Si/SiGe hetero-CMOS circuits

Semiquantitative performance extrapolation of Si/SiGe heterostructure p- and n-channel devices point to transconductances above 1000 mS/mm and cutoff frequencies around 200 GHz. Circuits such as inverters, logic arrays (e.g. NAND-gates) and flip-flops are simulated with feature sizes down to 0.05 µm showing a promising performance potential. Delay times of 2.5 and 0.5 ps/stage are obtained for an inverter chain at a power supply voltage of 1 and 2.5 V, respectively.