This paper presents the analysis of a simplified model for the design of a module structure that avoids the risk of self-excitedoscillation (SE-Osc). A necessaryand sufficient simplified model that can extract the critical oscillation mode is proposed based on a comparison of several simplifying steps. The differential equation of the simplified model is solved, and the solution is plotted in the frequency domain to analyze the oscillatory conditions. The simplified model is verified via a time-domain full-model simulation modeled by 3-D electromagnetic simulation and solved by finite-element simulation. Measurements of test modules show consistent oscillatory conditions and frequency. SE-Osc modes are eliminated by reducing the inductance connected to the emitter and increasing the inductance connected to the collector. Increasing the ratio of CCEto CGCincreases the risk of self-exciting oscillation. Suppressions of SE-Osc from a common package design with state-ofthe-art Si-insulated gate bipolar transistors (IGBTs) presenting small feedback capacitance, SiC-MOS, and hybrids of state-of-art Si-IGBTs and SiC-Schottky barrier diodes are verified.
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Saito et al. (2018) studied this question.
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